The miniaturization of solid-state imaging devices constituted by CCD or CMOS used in digital cameras and cell phones is increasingly demanded. Therefore, there is a shift recently from a conventional large package including the entire solid-state imaging element chips hermetically sealed in a package of ceramics or the like to a chip size package (CSP) type that has substantially the same size as the size of the solid-state imaging element chip.
A method for collectively manufacturing the CSP-type solid-state imaging devices in a wafer level is disclosed, for example, in PTL 1. In the method described in PTL 1, a plurality of solid-state imaging elements that constitute light receiving sections are formed on a silicon wafer, a cover glass wafer made of a transparent material is bonded to the silicon wafer through spacers formed to correspond with the light receiving sections, and the cover glass wafer and the silicon wafer are cut and diced to collectively manufacture the solid-state imaging devices.